The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2010

Filed:

Aug. 08, 2007
Applicants:

Wang Tingwu, Singapore, SG;

Pan Ju Yan, Singapore, SG;

Yu Yang, Singapore, SG;

HU Saigui, Singapore, SG;

Tomisawa Masayuki, Singapore, SG;

Inventors:

Wang Tingwu, Singapore, SG;

Pan Ju Yan, Singapore, SG;

Yu Yang, Singapore, SG;

Hu Saigui, Singapore, SG;

Tomisawa Masayuki, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 9/00 (2006.01); H04L 27/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus for demodulating an analogue input signal comprises a hard limiter stage () for converting the signal to a two level signal. A digital down converter/low pass filter stage () converts the signal to a base band signal, and a symbol synchronization stage () extracts symbol timing. An instantaneous phase detector () calculates the instantaneous phase of the one or more symbols associated with the input signal. If the input signal has been modulated according to a pi/4DQPSK, pi/2DBPSK, GMSK, or a GFSK modulation scheme, a differential detector () determines a difference in the phase between adjacent symbols, a coarse frequency offset compensation stage () applies a compensation signal to compensate for frequency offset, and a frequency offset estimation stage () updates this compensation signal. A demapper () generates a demodulated output signal after compensation by the frequency offset compensation stage.


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