Pc-based computing system having an integrated graphics subsystem supporting parallel graphics processing operations across a plurality of different graphics processing units (gpus) from the same or different vendors, in a manner transparent to graphics applications

Abstract

PC-based computing system having an integrated graphics subsystem supporting parallel graphics processing operations across a plurality of different graphics processing units (GPUs) supplied from the same or different vendors. The graphics subsystem include a graphics controller hub (GCH) chip located on a CPU bus, and having Multi-Pipeline Core Logic (MP-CL) circuitry including a routing unit and a control unit. The plurality of different GPUs are interfaced with the GCH chip. Each different GPU supports a GPU-driven pipeline core having a frame buffer (FB) for storing a fragment of pixel data. The GPU-driven pipeline cores are arranged in a parallel architecture and operated according to a parallelization mode of operation, so that said GPU-driven pipeline cores process data in a parallel manner. In one illustrative embodiment, the different GPUs are located (i) within an integrated graphics device (IGD) within the GCH chip, and also (ii) on one or more external GPU-based graphics cards from the same or different vendors. In another illustrative embodiment, the different GPUs are located on a plurality of external GPU-based graphics cards from different vendors. Diverse illustrative embodiments are disclosed.