The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2010

Filed:

Feb. 19, 2008
Applicants:

Hideaki Tanaka, Yokohama, JP;

Masakatsu Hoshi, Yokohama, JP;

Tetsuya Hayashi, Yokosuka, JP;

Shigeharu Yamagami, Yokohama, JP;

Inventors:

Hideaki Tanaka, Yokohama, JP;

Masakatsu Hoshi, Yokohama, JP;

Tetsuya Hayashi, Yokosuka, JP;

Shigeharu Yamagami, Yokohama, JP;

Assignee:

Nissan Motor Co., Ltd., Yokohama-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for producing a semiconductor device includes forming a first hetero-semiconductor layer as a hetero-junction to a surface of a silicon carbide epitaxial layer. This layer is composed of polycrystalline silicon having a band gap different from that of the silicon carbide epitaxial layer. An etching stopper layer composed of a material having a different etching rate from that of the polycrystalline silicon is formed on the surface of the first hetero-semiconductor layer. A second hetero-semiconductor layer composed of polycrystalline silicon is formed so that the second hetero-semiconductor layer contacts the surface of the first hetero-semiconductor layer and the etching stopper layer. The etching stopper layer is removed, the first hetero-semiconductor layer is thermally oxidized, and the thermally oxidized portion is then removed.


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