The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2010

Filed:

Nov. 22, 2006
Applicants:

Shoichiro Kasahara, Minowa, JP;

Fumikazu Komatsu, Okaya, JP;

Mitsuaki Sawada, Suwa, JP;

Yoshiyuki Kamihara, Sapporo, JP;

Takuya Ishida, Sapporo, JP;

Inventors:

Shoichiro Kasahara, Minowa, JP;

Fumikazu Komatsu, Okaya, JP;

Mitsuaki Sawada, Suwa, JP;

Yoshiyuki Kamihara, Sapporo, JP;

Takuya Ishida, Sapporo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 13/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit device includes a common transceiver macrocell including a circuit necessary for host operation and a circuit necessary for device operation. The common transceiver macrocell includes an analog front-end circuit and a high-speed logic circuit. The high-speed logic circuit includes a parallel/serial conversion circuit, a first parallel interface which serves as an interface between an external circuit and the parallel/serial conversion circuit, a sampling clock generation circuit, a serial/parallel conversion circuit, and a second parallel interface which serves as an interface between the serial/parallel conversion circuit and the external circuit.


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