The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2010

Filed:

Oct. 19, 2006
Applicants:

Biju Parameshwaran, Union City, CA (US);

Sriram Madhavan, Santa Clara, CA (US);

Andrew E. Carlson, Berkeley, CA (US);

Inventors:

Biju Parameshwaran, Union City, CA (US);

Sriram Madhavan, Santa Clara, CA (US);

Andrew E. Carlson, Berkeley, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one exemplary embodiment, a test device includes a transistor situated on a substrate. The test device further includes a protection device coupled by a fuse to a gate of the transistor in an interconnect metal layer, where the interconnect metal layer is formed over the substrate. The fuse allows the protection device to be decoupled from the gate of the transistor prior to testing the transistor. The test device further includes first and second contact pads formed over the substrate and coupled to respective terminals of the fuse to provide access to the fuse. A current can be applied between the first and second contacts pads to cause the fuse to open to decouple the protection device from the gate of the transistor. The test device further includes an antenna coupled to the gate of the transistor with interconnect metal segments for accumulating electrical charge during wafer processing.


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