The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2010

Filed:

Aug. 15, 2005
Applicants:

Jacob Kornerup, Austin, TX (US);

Biren Shah, Austin, TX (US);

Aljosa Vrancic, Austin, TX (US);

Matthew Curtis, Austin, TX (US);

Steve Rogers, Austin, TX (US);

Inventors:

Jacob Kornerup, Austin, TX (US);

Biren Shah, Austin, TX (US);

Aljosa Vrancic, Austin, TX (US);

Matthew Curtis, Austin, TX (US);

Steve Rogers, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A 'timed loop with frames' node may be included in a graphical program. The 'timed loop with frames' node may combine a timed loop with a timed sequence such that the timed sequence is executed at each iteration of the timed loop. The “timed loop with frames” node may be configured with first execution timing information that controls execution timing for the iterations of the loop. A plurality of graphical code portions may be included in the “timed loop with frames” such that a sequential order of execution for the graphical code portions is specified. The “timed loop with frames” node may be configured with second execution timing information that controls execution timing for the graphical code portions executed at each iteration.


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