The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2010
Filed:
May. 29, 2007
Subodh M. Reddy, Sunnyvale, CA (US);
Rajeev Murgai, Santa Clara, CA (US);
Subodh M. Reddy, Sunnyvale, CA (US);
Rajeev Murgai, Santa Clara, CA (US);
Fujitsu Limited, Kawasaki, JP;
Abstract
A method is provided and includes accessing a description of a chip, which includes sequential elements and a clock mesh. Items used include: the description of the chip, the information for modeling the sequential elements and interconnections, and the set of parameters of the clock mesh. Additionally, the method includes determining a plurality of original window locations covering the clock mesh. Further, for each original window location, the method includes expanding the original window location in one or more directions to generate a larger window location; generating a mesh simulation model inside the larger window location; simulating the mesh simulation model; measuring clock timing for the sequential elements in the original window location based on the simulation of the mesh simulation model; and collecting timing information on all the sequential elements on the chip based on the measured clock timing for the sequential elements in the original window locations.