The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2010
Filed:
Jul. 13, 2009
Koichi Okazawa, Tokyo, JP;
Koichi Kimura, Yokohama, JP;
Hitoshi Kawaguchi, Yokohama, JP;
Ichiharu Aburano, Hitachi, JP;
Kazushi Kobayashi, Ebina, JP;
Tetsuya Mochida, Yokohama, JP;
Koichi Okazawa, Tokyo, JP;
Koichi Kimura, Yokohama, JP;
Hitoshi Kawaguchi, Yokohama, JP;
Ichiharu Aburano, Hitachi, JP;
Kazushi Kobayashi, Ebina, JP;
Tetsuya Mochida, Yokohama, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection controller connected to address buses and control buses respectively of the processor, memory, and system buses to transfer address and control signals therebetween. The control system further includes a data path switch connected to data buses respectively of the processor, memory, and system buses to transfer data via the data buses therebetween depending on the data path control signal.