The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2010

Filed:

Jan. 03, 2008
Applicant:

Avi Haimzon, Givhatayim, IL;

Inventor:

Avi Haimzon, Givhatayim, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 23/00 (2006.01); H03K 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

This disclosure can provide methods, apparatus, and systems for dividing an input clock or master clock by an integer or non-integer divisor and generating one or more balanced, i.e., 50% duty cycle, divided that are phase-aligned to the input clock. The non-integer divisors can include half-integers, N/2, e.g. the division can be denoted 2:N. The value of N for each phase-aligned, balanced, divided clock can be distinct. The method can include generating an input clock signal having an input clock frequency, generating a secondary clock signal that transitions between a first state and a second state based on the input clock signal, generating a delayed secondary clock signal that is time delayed relative to the secondary clock signal, and generating the output clock signal that has a frequency that is a non-integer division of the input clock frequency.


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