The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2010

Filed:

Apr. 20, 2006
Applicants:

Darren Van Wageningen, Kanata, CA;

Curt Wortman, Ottawa, CA;

Inventors:

Darren Van Wageningen, Kanata, CA;

Curt Wortman, Ottawa, CA;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04Q 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Integrated circuits such as programmable logic device integrated circuits are provided with transmitter and receiver circuitry for communicating over multi-lane serial communications links. Data is transmitted over the serial communications links in the form of data packets. Priority data packets may be nested within regular data packets. Regular data packets may be formed using start-of-packet and end-of-packet markers. The locations at which priority packets are nested within regular data packets may be denoted using suspend and continuation markers. A single cyclic redundancy check generator may be used to generate cyclic redundancy check words for the data packets. Start-of-packet markers, end-of-packet markers, suspend markers, continuation markers, and cyclic redundancy check words may be inserted and extracted from the serial communications link at fixed lane locations.


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