The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2010
Filed:
Jan. 18, 2008
Roberto Ravasio, Presezzo, IT;
Detlev Richter, Munich, DE;
Gert Koebernik, Unterhaching, DE;
Girolamo Gallo, Padua, IT;
Mirko Reissmann, Ottendorf-Okrilla, DE;
Ramirez Xavier Veredas, Munich, DE;
Roberto Ravasio, Presezzo, IT;
Detlev Richter, Munich, DE;
Gert Koebernik, Unterhaching, DE;
Girolamo Gallo, Padua, IT;
Mirko Reissmann, Ottendorf-Okrilla, DE;
Ramirez Xavier Veredas, Munich, DE;
Qimonda AG, Munich, DE;
Abstract
Embodiments of the invention relate generally to an integrated circuit having a memory cell arrangement and a method for reading a memory cell state using a plurality of partial readings. In an embodiment of the invention, an integrated circuit having a memory cell arrangement is provided. The memory cell arrangement may include at least one memory cell, the memory cell being capable of storing a plurality of memory cell states being distinguishable by a predefined number of memory cell threshold values, and a controller configured to read a memory cell state of the at least one memory cell using a number of reference levels that is higher than the predefined number of memory cell threshold values, wherein the reading includes a first partial reading using a first set of a plurality of reference levels and a second partial reading using a second set of a plurality of reference levels, wherein the second set of a plurality of reference levels includes at least one reference level which is different from the reference levels of the first set of a plurality of reference levels.