The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2010

Filed:

Oct. 23, 2007
Applicants:

Reuven Bakalash, Shdema, IL;

Offir Remez, Hod HaSharon, IL;

Gigy Bar-or, Kochav Yair, IL;

Efi Fogel, Tel Aviv, IL;

Amir Shaham, Givat Shmuel, IL;

Inventors:

Reuven Bakalash, Shdema, IL;

Offir Remez, Hod HaSharon, IL;

Gigy Bar-Or, Kochav Yair, IL;

Efi Fogel, Tel Aviv, IL;

Amir Shaham, Givat Shmuel, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 15/00 (2006.01); G06F 13/14 (2006.01); G06F 15/16 (2006.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
Abstract

A PC-based computing system capable of displaying images of 3-D objects during an interactive process between said computing system and a user thereof. The PC-based computing system includes system memory for storing software graphics applications, software drivers and graphics libraries, and an operating system (OS), stored in the system memory, and a central processing unit (CPU), for executing the OS, graphics applications, drivers. and graphics libraries. The system also includes an CPU interface module and a PC bus, a graphics processing subsystem interfaced with the CPU interface module by way of the PC bus, and a display surface for displaying said images by graphically displaying frames of pixel data produced by the graphics processing subsystem. The graphics processing subsystem includes a plurality of GPUs arranged in a parallel architecture and operating according to a parallelization mode of operation so that each GPU supports a graphics pipeline and is allowed to process data in a parallel manner. A hardware hub, interfaces with the CPU interface module and the GPUs, by way of the PC bus, and has a hub router for (i) distributing the stream of geometrical data and graphic commands among the GPUs, and (ii) transferring pixel data output from one or more of GPUs during the composition of frames of pixel data corresponding to final images for display on the display surface. The CPU interface module provides an interface between one or more software hub drivers and the hardware hub.


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