The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2010

Filed:

Dec. 30, 2008
Applicants:

James E. Clayton, Raleigh, NC (US);

Zakaryae Fathi, Raleigh, NC (US);

Inventors:

James E. Clayton, Raleigh, NC (US);

Zakaryae Fathi, Raleigh, NC (US);

Assignee:

Microelectronics Assembly Technologies, Inc., Research Triangle Park, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 7/20 (2006.01); H01R 12/24 (2006.01); H01R 43/02 (2006.01); H04L 12/50 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multichip module comprises a multilayer substrate circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The conductive patterns include a series of electrical contacts adjacent to one edge of the substrate. The substrate is bonded to two rigid frames, one on each opposite surface. Each substrate has a series of castellations on one edge that are aligned and electrically connected to the respective contacts on the substrate, preferably by soldering. The castellations can serve as a self-aligning mechanism when the module is brought into contact with a low-profile pin array, and the module may be held in place on a motherboard by guide rails in a socket that engages the edges perpendicular to the castellated edge of the module. The module may further be provided with protective heat spreading covers.


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