The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2010

Filed:

Oct. 24, 2006
Applicants:

Dane T. Mrazek, Redwood City, CA (US);

Sameer M. Gauria, Mountain View, CA (US);

James C. Bowman, Pescadero, CA (US);

Inventors:

Dane T. Mrazek, Redwood City, CA (US);

Sameer M. Gauria, Mountain View, CA (US);

James C. Bowman, Pescadero, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/36 (2006.01); G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are an apparatus, a system, a method, a graphics processing unit ('GPU'), a computer device, and a computer medium to implement a pool of independent enhanced tags to, among other things, decouple a dependency between tags and cachelines. In one embodiment, an enhanced tag-based cache structure includes a tag repository configured to maintain a pool of enhanced tags. Each enhanced tag can have a match portion configured to form an association between the enhanced tag and an incoming address. Also, an enhanced tag can have a data locator portion configured to locate a cacheline in the cache in response to the formation of the association. The data locator portion enables the enhanced tag to locate multiple cachelines. Advantageously, the enhanced tag-based cache structure can be formed to adjust the degree of reusability of the enhanced tags independent from the degree of latency tolerance for the cacheline repository.


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