The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2010

Filed:

Jul. 07, 2005
Applicants:

Shin Takagi, Shinagawa-ku, JP;

Hideyuki Rengakuji, Koto-ku, JP;

Inventors:

Shin Takagi, Shinagawa-ku, JP;

Hideyuki Rengakuji, Koto-ku, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/167 (2006.01); G06F 12/02 (2006.01); G09G 5/397 (2006.01);
U.S. Cl.
CPC ...
Abstract

An image signal processing apparatus which is capable of preventing the 'simultaneous display of an original image and the immediately preceding image' as well as dropping of frames. A signal processor subjects an image pickup signal corresponding to a subject outputted from an image pickup device to signal processing. A VRAM (Video Random Access Memory) section is composed of at least three storage areas that store image signals outputted from the signal processing circuit. A VRAM management information section stores management information indicative of storage states of the respective storage areas of the VRAM section. A compression circuit subjects an image signal read from the VRAM section to compression processing. An image display processing circuit subjects an image signal read from the VRAM section to image display processing. An image display section displays images based on the image signal outputted from the image display processing circuit. A memory controller controls read/write operations for image signals in the respective storage areas of the VRAM section based on the management information stored in the VRAM management information section.


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