The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2010

Filed:

May. 24, 2006
Applicant:

Nobuyuki Tanaka, Kanagawa, JP;

Inventor:

Nobuyuki Tanaka, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit includes a sampling unit, a delay unit, a first operating unit and a second operating unit. The sampling unit samples an input signal supplied from an external circuit in synchronization with a clock signal, and outputs the sampled input signal as a first signal. The delay unit delays the first signal in synchronization with the clock signal, and outputs the delayed first signal as a second signal. The first operating unit operates whether a signal level of the input signal is sustained equal to or longer than a predetermined period based on the first and second signals, and outputs an output signal in synchronization with the clock signal when the signal level of the input signal is sustained equal to or longer than the predetermined period. A signal level of the output signal is sustained equal to or longer than the predetermined period. The second operating unit asynchronously controls the sampling unit based on the input signal and the output signal.


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