The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2010

Filed:

Mar. 29, 2007
Applicants:

Garrett A. Storaska, Reston, VA (US);

Robert S. Howell, Wheaton, MD (US);

Harvey C. Nathanson, Pittsburgh, PA (US);

Francis William Hopwood, Severna Park, MD (US);

Inventors:

Garrett A. Storaska, Reston, VA (US);

Robert S. Howell, Wheaton, MD (US);

Harvey C. Nathanson, Pittsburgh, PA (US);

Francis William Hopwood, Severna Park, MD (US);

Assignee:

Northrop Grumman Systems Corporation, Los Angeles, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A curled transistor comprises a coiled semiconductor substrate having a plurality of concentrically curled layers. Source and drain regions are configured on a portion of the coiled semiconductor substrate, and a gate dielectric is positioned between the source and drain regions. A first set of metallic contacts electrically couple to the source region on the coiled semiconductor substrate and a second set of metallic contacts electrically couple to the drain region on the coiled semiconductor substrate.


Find Patent Forward Citations

Loading…