The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2010

Filed:

Dec. 28, 2004
Applicants:

Jhih-cyuan Huang, Taipei, TW;

Huey-tyug Chua, Hsin-Chu Hsien, TW;

Yann-chang Lin, Hsin-Chu, TW;

Inventors:

Jhih-Cyuan Huang, Taipei, TW;

Huey-Tyug Chua, Hsin-Chu Hsien, TW;

Yann-Chang Lin, Hsin-Chu, TW;

Assignee:

Mediatek Incoropration, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Task management methods. A plurality of GBL (global bandwidth limiter) classes is provided. One of the GBL classes is selected based on the priority of a first task, in which the first task is from a MCU (micro-controller unit) bus. A system GBL class is selected based on the highest GBL class which has been selected among the GBL classes. A bandwidth limiter of a DMA (direct memory access) unit is assigned according to the system GBL class and the priority of a second task if the DMA unit is activated by the second task. The second task is from a DMA bus, and the cycle between the DMA and MCU buses is determined according to the bandwidth limiter.


Find Patent Forward Citations

Loading…