The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 2010
Filed:
Oct. 19, 2005
Wensheng Huang, Cary, NC (US);
Wensheng Huang, Cary, NC (US);
Telefonaktiebolaget LM Ericsson (publ), Stockholm, SE;
Abstract
The present invention comprises an interleaver that uses a reduced interleaving table to generate interleaved output data blocks from input data blocks. By iteratively applying the reduced interleaving table to bits in the input data blocks, the interleaver generates output data blocks equivalent to those that would have been generated using a full-size interleaving table. According to one embodiment of the present invention, the interleaving circuit includes a grouping circuit, a permuting circuit, and a mapping circuit. The grouping circuit groups the bits of each data block into a plurality of sub-blocks, while the permuting circuit independently permutes the data bits in each sub-block using the reduced interleaving table to generate permuted sub-blocks. The mapping circuit maps the bits from each permuted sub-block to one or more output data blocks, where the bits in each output data block may comprise bits from different sub-blocks and/or different input data blocks.