The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2010

Filed:

Dec. 27, 2006
Applicants:

Takao Toi, Tokyo, JP;

Tooru Awashima, Tokyo, JP;

Hirokazu Kami, Tokyo, JP;

Takeshi Inuo, Tokyo, JP;

Nobuki Kajihara, Tokyo, JP;

Taro Fujii, Kanagawa, JP;

Kenichiro Anjo, Kanagawa, JP;

Koichiro Furuta, Kanagawa, JP;

Masato Motomura, Kanagawa, JP;

Inventors:

Takao Toi, Tokyo, JP;

Tooru Awashima, Tokyo, JP;

Hirokazu Kami, Tokyo, JP;

Takeshi Inuo, Tokyo, JP;

Nobuki Kajihara, Tokyo, JP;

Taro Fujii, Kanagawa, JP;

Kenichiro Anjo, Kanagawa, JP;

Koichiro Furuta, Kanagawa, JP;

Masato Motomura, Kanagawa, JP;

Assignees:

NEC Corporation, Tokyo, JP;

NEC Electronics Corporation, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/00 (2006.01); G06F 1/24 (2006.01); G06F 17/50 (2006.01); G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Configuration codes for implementing a plurality of circuits having different attributes are generated and stored in a memory for each task executed in a reconfigurable device. When the reconfigurable device is operated, an appropriate circuit to be executed by the reconfigurable device is selected in accordance with an operation state of the system from among a plurality of circuits having different attributes, and the configuration code for implementing the selected circuit is loaded from the memory into the reconfigurable device.


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