The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 2010
Filed:
Nov. 16, 2004
Fred A. Kish, Jr., Palo Alto, CA (US);
Frank H. Peters, San Jose, CA (US);
Radhakrishnan L. Nagarajan, Cupertino, CA (US);
Richard P. Schneider, Mountain View, CA (US);
Fred A. Kish, Jr., Palo Alto, CA (US);
Frank H. Peters, San Jose, CA (US);
Radhakrishnan L. Nagarajan, Cupertino, CA (US);
Richard P. Schneider, Mountain View, CA (US);
Infinera Corporation, Sunnyvale, CA (US);
Abstract
Method and apparatus for utilizing a probe card for testing in-wafer photonic integrated circuits (PICs) comprising a plurality of in-wafer photonic integrated circuit (PIC) die formed in the surface of a semiconductor wafer where each PIC comprises one or more electro-optic components with formed wafer-surface electrical contacts. The probe card has a probe card body with at least one row of downwardly dependent, electrically conductive contact probes. The probe body is transversely translated over the surface of the wafer to a selected in-wafer photonic integrated circuit (PIC) die. Then, the contact probes of the probe card are brought into engagement with surface electrical contacts of the selected photonic integrated circuit (PIC) die for testing the operation of electro-optic components in the selected in-wafer photonic integrated circuit (PIC) die.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile