Pll circuit

Abstract

A PLL circuit which can absorb variation of phase noise characteristic due to temperature and individual difference and has a phase noise suppression characteristic stable in a wide frequency band is provided. The PLL circuit comprises, at the succeeding stage, a first register for storing a first parameter for controlling the loop gain, a first multiplier for multiplying the output of the phase comparator by a first parameter, a second register for storing a second parameter for controlling the response characteristic, a second multiplier for multiplying the output of the first multiplier by a second parameter, and a CPU for setting optimum parameters in the first and second registers depending on the use frequency band, the ambient temperature, and the device individual difference. By controlling the loop gain and the response characteristic to optimum values, a good suppression characteristic in a wide frequency band is achieved.