The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2010

Filed:

Mar. 31, 2008
Applicants:

Gustavo James Mehas, Sunnyvale, CA (US);

Naveen Jain, Panipat, IN;

Jayant Vivrekar, San Jose, CA (US);

Michael Jason Houston, Cary, NC (US);

Inventors:

Gustavo James Mehas, Sunnyvale, CA (US);

Naveen Jain, Panipat, IN;

Jayant Vivrekar, San Jose, CA (US);

Michael Jason Houston, Cary, NC (US);

Assignee:

Intersil Americas Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.


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