The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2010

Filed:

Jan. 18, 2007
Applicant:

Masayuki Terai, Tokyo, JP;

Inventor:

Masayuki Terai, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/336 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2006.01); H01L 31/113 (2006.01); H01L 31/119 (2006.01);
U.S. Cl.
CPC ...
Abstract

There is provided a trap memory device suppresses electric charges from flowing from the outside into a charge accumulation region and accumulated electric charges from diffusing to the outside or flowing out due to a defect. A gate conductoris formed through a laminate insulating film including a first gate insulating film, a charge accumulation layerand a second gate insulating filmon a silicon substrate. The laminate insulating film (to) projects outside the gate conductorand extends to under the outer end of a side wall. The charge accumulation layerincludes a high trap surface-density regionimmediately under the gate conductor and a low trap surface-density regionoutside the gate conductor.


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