The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2010

Filed:

Jun. 28, 2007
Applicants:

Tonio Gaetano Biondi, Catania, IT;

Giuseppe Greco, Acireale, IT;

Salvatore Rinaudo, San Marco d'Alunzio, IT;

Gaetano Bazzano, Floridia, IT;

Inventors:

Tonio Gaetano Biondi, Catania, IT;

Giuseppe Greco, Acireale, IT;

Salvatore Rinaudo, San Marco d'Alunzio, IT;

Gaetano Bazzano, Floridia, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method models the electrical characteristics of wide-channel transistors, such as power transistors, by generating a lumped-element distributed circuit model. More specifically, the active area of the transistor is organized in elementary transistor cells, which are substituted by active lumped elements. Similarly the passive area of the transistor is organized in elementary strip-lines, which are substituted by passive lumped elements. Preferably, the parameters of the lumped elements are extracted automatically from layout information, such as path dimensions, and technological data, such as sheet resistance of the metal layers, sheet resistance of the polysilicon layers and oxide thickness.


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