The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2010

Filed:

Jan. 20, 2004
Applicants:

Duane Arlyn Averill, Rochester, MN (US);

Russell Dean Hoover, Rochester, MN (US);

David Alan Shedivy, Rochester, MN (US);

Martha Ellen Voytovich, Rochester, MN (US);

Inventors:

Duane Arlyn Averill, Rochester, MN (US);

Russell Dean Hoover, Rochester, MN (US);

David Alan Shedivy, Rochester, MN (US);

Martha Ellen Voytovich, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A computer system includes multiple caches and a cache line state directory structure, having at least a portion dedicated to a particular device cache within a particular device, and contains a fixed number of entries having a one-to-one correspondence to the cache lines of the cache to which it corresponds. The cache line state directory is used to determine whether it is necessary to send an invalidation message to the device cache. In the preferred embodiment, a dedicated portion of the cache line state directory structure corresponds to an I/O bridge device cache. Preferably, the cache line state directory also maintains state for one or more processor caches in a different format. The computer system preferably uses a NUMA architecture, the directories being maintained by node servers in each node.


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