The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2010
Filed:
Dec. 03, 2004
Makoto Yokoyama, Matsusaka, JP;
Hajime Washio, Sakurai, JP;
Yuhichiroh Murakami, Matsusaka, JP;
Kenji Hyoudou, Osaka, JP;
Hiroshi Murofushi, Kyoto, JP;
Makoto Yokoyama, Matsusaka, JP;
Hajime Washio, Sakurai, JP;
Yuhichiroh Murakami, Matsusaka, JP;
Kenji Hyoudou, Osaka, JP;
Hiroshi Murofushi, Kyoto, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
An output pulse of a flip flop is delayed in a delay inverter circuit before supplied to an input terminal of a level shifter. Then, an output pulse of the next stage flip flop is supplied to a reset terminal of the first flip flop and also to an enable terminal of the level shifter. Further, the level shifter output a sampling pulse with a beginning end equal to the beginning end of the pulse supplied to the input terminal and a terminal and equal to the beginning and of the pulse supplied to the enable terminal. With this arrangement, the subject invention provides a pulse output circuit, a driving circuit for a display device using the pulse output circuit, a display device and a pulse output method, that reduce delay of the terminal end of the pulse in sequentially outputting pulses from plural output terminals.