The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2010
Filed:
Jul. 06, 2006
Min-seog Choi, Seoul, KR;
Kae-dong Back, Yongin-si, KR;
In-sang Song, Seoul, KR;
Woon-bae Kim, Suwon-si, KR;
Byung-gil Jeong, Anyang-si, KR;
Kyu-dong Jung, Suwon-si, KR;
Min-seog Choi, Seoul, KR;
Kae-dong Back, Yongin-si, KR;
In-sang Song, Seoul, KR;
Woon-bae Kim, Suwon-si, KR;
Byung-gil Jeong, Anyang-si, KR;
Kyu-dong Jung, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
A packaging chip formed with plural wafers. The packaging chip includes plural wafers stacked in order and plural interconnection electrodes directly connecting the plural wafers from an upper surface of an uppermost wafer of the plural wafers to the other wafers. At least one or more of the plural wafers mounts a predetermined circuit device thereon. Further, at least one or more wafers of the plural wafers have a cavity of a predetermined size. Meanwhile, the packaging chip further includes plural pads independently arranged on the upper surface of the uppermost wafer one another and electrically connected to the plural interconnection electrodes respectively. Accordingly, the present invention can enhance the performance and reliability of a packaging chip and improve fabrication yield.