The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2010
Filed:
Apr. 03, 2009
Kazunori Miyoshi, Minato-ku, JP;
Kazuhiko Kurata, Minato-ku, JP;
Takanori Shimizu, Minato-ku, JP;
Ichiro Hatakeyama, Minato-ku, JP;
Junichi Sasaki, Minato-ku, JP;
Kazunori Miyoshi, Minato-ku, JP;
Kazuhiko Kurata, Minato-ku, JP;
Takanori Shimizu, Minato-ku, JP;
Ichiro Hatakeyama, Minato-ku, JP;
Junichi Sasaki, Minato-ku, JP;
NEC Corporation, Tokyo, JP;
Abstract
A semiconductor device has printed wiring board () where electric wiring () connected to LSI chip () and to planar optical element () is formed, and where optical waveguide () which transfers light inputted into planar optical element () and/or light outputted from planar optical element () is fixed. Planar optical element () is mounted in one end of small substrate (), and another end of small substrate () is connected to printed wiring board () by solder bump (). One end of small substrate () where planar optical element () is mounted is fixed to printed wiring board () by a fixing mechanism. Small substrate () has flexible section (), which is easily deformable compared with other portions of printed wiring board () and small substrate (), in at least a partial region between one end where planar optical element () is mounted and another end electrically connected to printed wiring board ().