Fractionally related multirate signal processor and method

Abstract

A multirate processing circuit () with a resampling filter () to accept a sampled input signal () sampled with a first clock rate and to filter the sampled input signal to remove spectral components above a spectral bandwidth of a second clock rate. The sampled input signal represents a signal that is more efficiently processed at the second clock rate, which is fractionally related to the first clock rate. The multirate processing circuit () also has a discrete time processor () that receives the resampling filter output () and processes that output at an integer power of two multiple of the first clock rate. The discrete time processor () further excludes selected samples from the processing so as to effectively perform discrete time processing of the resampling filter output () at the integer power of two multiple of the second clock rate.