The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2010
Filed:
Dec. 05, 2007
Applicants:
Jae-hoon Cha, Kyoungki-do, KR;
Byoung-jin Choi, Kyoungki-do, KR;
Inventors:
Jae-Hoon Cha, Kyoungki-do, KR;
Byoung-Jin Choi, Kyoungki-do, KR;
Assignee:
Hynix Semiconductor, Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A semiconductor memory device is capable of controlling a tRCD (RAS to CAS Delay) time regardless of an address input timing during a test operation of the semiconductor memory device. The semiconductor memory device includes a column address strobe pulse generator for generating a column address strobe pulse in response to a column command signal and a row address strobe pulse generator for receiving an active command signal or the column command signal to produce a row address strobe pulse in response to a test mode signal.