The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2010

Filed:

Sep. 26, 2008
Applicants:

Hideyuki Sakamoto, Gunma, JP;

Hidefumi Saito, Gunma, JP;

Yasuhiro Koike, Gunma, JP;

Masao Tsukizawa, Gunma, JP;

Inventors:

Hideyuki Sakamoto, Gunma, JP;

Hidefumi Saito, Gunma, JP;

Yasuhiro Koike, Gunma, JP;

Masao Tsukizawa, Gunma, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.


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