The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 24, 2010
Filed:
Sep. 22, 2008
Taufik, San Luis Obispo, CA (US);
Dodi Garinto, Solo, ID;
Ian O. Waters, San Luis Obispo, CA (US);
Kay K. Ohn, San Luis Obispo, CA (US);
Taufik, San Luis Obispo, CA (US);
Dodi Garinto, Solo, ID;
Ian O. Waters, San Luis Obispo, CA (US);
Kay K. Ohn, San Luis Obispo, CA (US);
California Polytechnic Corporation, San Luis Obispo, CA (US);
Abstract
A multiphase buck DC to DC converter with an input-output LC tank. The multiphase buck DC to DC converter with an input-output LC tank includes multiple synchronous buck DC to DC converter cells. Each one of the synchronous buck DC to DC converter cells having an input node, an output node and a control node. The synchronous buck DC to DC converter cells are arranged in a parallel configuration including having the input nodes of each one of the synchronous buck DC to DC converter cells connected together at a common input node. The synchronous buck DC to DC converter cells are also arranged in pairs of synchronous buck DC to DC converter cells. The output nodes of each one of the pairs of the synchronous buck DC to DC converter cells are connected to corresponding pair output node. Each one of the pairs of the synchronous buck DC to DC converter cells include a capacitor connected between the common input node and the corresponding pair output node and a corresponding output inductor connected between the corresponding pair output node and a common output node. Methods of reducing a DC input voltage are also disclosed. A multiphase buck DC to DC converter with a bypass capacitor is also disclosed.