The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2010

Filed:

Jan. 11, 2007
Applicants:

James Weaver, Corvallis, OR (US);

S. Jonathan Wang, Albany, OR (US);

John Chen, Corvallis, OR (US);

Sadiq Bengali, Corvallis, OR (US);

Edward Enciso, Houston, TX (US);

Tom Cooney, Corvallis, OR (US);

Inventors:

James Weaver, Corvallis, OR (US);

S. Jonathan Wang, Albany, OR (US);

John Chen, Corvallis, OR (US);

Sadiq Bengali, Corvallis, OR (US);

Edward Enciso, Houston, TX (US);

Tom Cooney, Corvallis, OR (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/335 (2006.01);
U.S. Cl.
CPC ...
Abstract

High-voltage CMOS devices and low-voltage CMOS devices are integrated on a common substrate by forming a sacrificial film over at least active device areas, lithographically defining device active regions of the high-voltage CMOS devices, implanting dopants selectively through the sacrificial film into the lithographically defined device active regions of the high-voltage CMOS devices, diffusing the implanted dopants, removing the sacrificial film, and subsequently forming low-voltage CMOS devices.


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