The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7779377 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 17, 2010

Filed:

Jan. 29, 2007
Applicant:

Tsuneo Nakata, Kawasaki, JP;

Inventor:

Tsuneo Nakata, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A verification aiding apparatus includes an acquiring unit that acquires implementation description information of a verification target circuit, and a classifying unit that classifies registers in the verification target circuit for each type of processing for each command executable by the verification target circuit. Thus, implementation description classification information can be obtained. A setting unit performs a verification priority setting process and a generating unit performs a sequential command generating process, and a sequential command is output.


Find Patent Forward Citations

Nakata, Tsuneo. (2010). Method and apparatus for aiding verification of circuit, and computer product (U.S. Patent No. 7779377). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7779377

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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