The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Aug. 13, 2007
Tsu-wei Tseng, Taipei, TW;
Chih-chiang Hsu, Taipei County, TW;
Jin-fu LI, Pingtung County, TW;
Chien-yuan Pao, Taipei, TW;
Tsu-Wei Tseng, Taipei, TW;
Chih-Chiang Hsu, Taipei County, TW;
Jin-Fu Li, Pingtung County, TW;
Chien-Yuan Pao, Taipei, TW;
Faraday Technology Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A built-in redundancy analyzer and a redundancy analysis method thereof for a chip having a plurality of repairable memories are provided. The method includes the following steps. First, the identification code of a repairable memory containing a fault ('fault memory' for short) is identified and a parameter is provided according to the identification code. The parameter includes the length of row address, the length of column address, the length of word, the number of redundancy rows, and the number of redundancy columns of the fault memory. Since the parameter of every individual repairable memory is different, the fault location is converted into a general format according to the parameter for easier processing. A redundancy analysis is then performed according to the parameter and the converted fault location, and the analysis result is converted from the general format to the format of the fault memory and output to the fault memory.