The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Nov. 21, 2005
Maurice L. Hutson, Byron, MN (US);
Maurice L. Hutson, Byron, MN (US);
Efficient Memory Technology, Rochester, MN (US);
Abstract
An interleaved addressing technique for addressing a plurality of memory banks () uses a plurality of abbreviated interleaves (0, 1, . . . 2−1) each addressing more than one and less than all of the memory banks. The interleaves are offset (S) from each adjacent other as to address all of the memory banks equally. An intelligent memory bank for use with interleaved memories storing plural vectors comprises setup apparatus () receives an initial address (B+C+V+N) and spacing data (D) for each vector. Addressing logic () associates a memory cell select (C) to each initial and subsequent address of each of the plurality of vectors. Cell select apparatus () accesses a memory cell (in) using a memory cell select (C) associated to a respective one of the initial and successive addresses of each vector.