The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Jun. 06, 2008
Sergey Shumarayev, Los Altos Hills, CA (US);
Thungoc M. Tran, San Jose, CA (US);
Wilson Wong, San Francisco, CA (US);
Simardeep Maangat, Sunnyvale, CA (US);
Sergey Shumarayev, Los Altos Hills, CA (US);
Thungoc M. Tran, San Jose, CA (US);
Wilson Wong, San Francisco, CA (US);
Simardeep Maangat, Sunnyvale, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Signal offset variation caused by transistor variation/mismatch in integrated circuits may be reduced. In one embodiment, a buffer circuit has variable-valued circuit elements. Offset variation measurements are made and the variable-valued circuit elements are calibrated to reduce the measured offset variation. In another embodiment, each amplifying stage of a multi-stage buffer provides variable gain. The total DC gain of the cascade is distributed unevenly across the stages, with more DC gain being provided by amplifier stages at the beginning of the cascade than at the end. An additional pre-amplifier stage can also be provided at the beginning of the cascade.