The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Oct. 31, 2007
Hyeong-sun Hong, Gyeonggi-do, KR;
Jae-goo Lee, Gyeonggi-do, KR;
Dong-hyun Kim, Gyeonggi-do, KR;
Sung-un Kwon, Jeollabuk-do, KR;
Sang-joon Park, Seoul, KR;
Nam-jung Kang, Gyeonggi-do, KR;
Hyeong-Sun Hong, Gyeonggi-do, KR;
Jae-Goo Lee, Gyeonggi-do, KR;
Dong-Hyun Kim, Gyeonggi-do, KR;
Sung-Un Kwon, Jeollabuk-do, KR;
Sang-Joon Park, Seoul, KR;
Nam-Jung Kang, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;
Abstract
A semiconductor device having a contact barrier for insulating contacts with a large aspect ratio and having a fine pitch between adjacent conductive lines and a method of manufacturing the same are provided. The semiconductor device includes a buried contact formed in a region between two adjacent first conductive lines and two adjacent second conductive lines. Insulating lines define a width of the buried contact. To form the contact barrier, an interlayer dielectric layer formed on the second conductive lines is patterned to form a space and an insulating line having an etching ratio different from the interlayer dielectric layer is formed in the space. The interlayer dielectric layer is selectively wet etched relative to an insulating layer covering the second conductive line and the first insulating line to form buried contact hole. The buried contact hole is filled with conductive material to form a buried contact.