The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2010
Filed:
Dec. 07, 2006
O Kyun Kwon, Daejeon, KR;
MI Ran Park, Daejeon, KR;
Won Seok Han, Daejeon, KR;
Hyun Woo Song, Daejeon, KR;
O Kyun Kwon, Daejeon, KR;
Mi Ran Park, Daejeon, KR;
Won Seok Han, Daejeon, KR;
Hyun Woo Song, Daejeon, KR;
Electronics and Telecommunications Research Institute, Daejeon, KR;
Abstract
Provided are an etching method for a multi-layered structure of semiconductors in groups III-V and a method of manufacturing a VCSEL using the etching method. According to the etching method, a stacked structure including a first semiconductor layer and a second semiconductor layer is exposed to a plasma of a mixture consisting of Cl, Ar, CH, and Hto etch the stacked structure, so that a mirror layer of the VCSEL is formed. The first semiconductor layer is formed of a semiconductor in groups III-V and the second semiconductor layer is formed of a semiconductor in groups III-V, other than the semiconductor of the first semiconductor layer. At least part of a lower mirror layer, a lower electrode layer, an optical gain layer, an upper electrode layer, and an upper mirror layer is etched using one time of an etching process, so that a clean and smooth etched surface is obtained.