The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
Mar. 11, 2005
Miyoshi Saito, Kawasaki, JP;
Hisanori Fujisawa, Kawasaki, JP;
Hideki Yoshizawa, Kawasaki, JP;
Tetsu Tanizawa, Kawasaki, JP;
Ichiro Kasama, Kawasaki, JP;
Tetsuo Kawano, Kawasaki, JP;
Kazuaki Imafuku, Kawasaki, JP;
Hiroshi Furukawa, Kawasaki, JP;
Shiro Uriu, Yokohama, JP;
Mitsuharu Wakayoshi, Yokohama, JP;
Miyoshi Saito, Kawasaki, JP;
Hisanori Fujisawa, Kawasaki, JP;
Hideki Yoshizawa, Kawasaki, JP;
Tetsu Tanizawa, Kawasaki, JP;
Ichiro Kasama, Kawasaki, JP;
Tetsuo Kawano, Kawasaki, JP;
Kazuaki Imafuku, Kawasaki, JP;
Hiroshi Furukawa, Kawasaki, JP;
Shiro Uriu, Yokohama, JP;
Mitsuharu Wakayoshi, Yokohama, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A reconfigurable operation apparatus consists of a plurality of operation units capable of reconfiguring themselves by using a piece of given first configuration data and of operating simultaneously with one another; RAMs; diverse processor elements required for constituting an operation apparatus; an inter-resource network interconnecting the operation units, the RAMs and the diverse processor elements, performing data transfers between resources connected thereto in a uniform transfer time independent of positions and kinds of the resources, and being reconfigurable by using a given second configuration data; and a configuration memory storing the first and the second configuration data. Configuration data is loaded from an external storage apparatus onto the configuration memory, and the first and the second configuration data are supplied to the reconfigurable processor resources in appropriate sequence and timing based on data available from a plurality of operation units.