The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2010

Filed:

Sep. 08, 2005
Applicants:

Terumasa Haneda, Kawasaki, JP;

Yuichi Ogawa, Kawasaki, JP;

Toshiyuki Yoshida, Kawasaki, JP;

Yuji Hanaoka, Kawasaki, JP;

Inventors:

Terumasa Haneda, Kawasaki, JP;

Yuichi Ogawa, Kawasaki, JP;

Toshiyuki Yoshida, Kawasaki, JP;

Yuji Hanaoka, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 15/167 (2006.01);
U.S. Cl.
CPC ...
Abstract

A DMA circuit operates a plurality of DMA channels in parallel, enabling reduction of the circuit scale and fewer development processes. A channel manager circuit reads in sequence the control information for each DMA channel from control memory, performs analysis, and according to the divided DMA control sequence, performs state processing (DMA control). Further, the channel manager circuit updates the control information, writes back the control information to the control memory, and executes time-division control of the plurality of DMA channels. Hence the circuit scale can be reduced, contributing to decreased costs, and the number of development processes can be reduced.


Find Patent Forward Citations

Loading…