The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
Jan. 21, 2004
Wilson Wong, San Francisco, CA (US);
Sergey Shumarayev, San Leandro, CA (US);
Simardeep Maangat, Sunnyvale, CA (US);
Rakesh Patel, Cupertino, CA (US);
Wilson Wong, San Francisco, CA (US);
Sergey Shumarayev, San Leandro, CA (US);
Simardeep Maangat, Sunnyvale, CA (US);
Rakesh Patel, Cupertino, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A programmable logic device is provided with adaptive equalization circuitry that is programmable in one or more respects. Examples of the programmable aspects of the equalization circuitry are () the number of taps used, () whether integer or fractional spaced taps are used, () what starting values are used in the computation of coefficient values, () whether satisfactory coefficient values are computed only once or on an on-going basis, () whether an error signal is generated using a decision directed algorithm or using a training pattern, () what training pattern (if any) is used, and/or () the location of the sampling point in the bit period of the signal to be equalized.