The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2010

Filed:

Jul. 14, 2005
Applicants:

Vladimir Sindalovsky, Perkasie, PA (US);

Lane A. Smith, Easton, PA (US);

Ronald Lamar Freyman, Bethlehem, PA (US);

Max Jay Olsen, Mertztown, PA (US);

Inventors:

Vladimir Sindalovsky, Perkasie, PA (US);

Lane A. Smith, Easton, PA (US);

Ronald Lamar Freyman, Bethlehem, PA (US);

Max Jay Olsen, Mertztown, PA (US);

Assignee:

Agere Systems Inc., Allentown, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 3/46 (2006.01); H04B 17/00 (2006.01); H04Q 1/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

The various embodiments of the invention provide an apparatus, system and method of asynchronous testing a serializer and deserializer data communication apparatus (SERDES) for determining frequency and phase locking to pseudo asynchronous input data having a continual phase offset. An exemplary apparatus includes a data sampler adapted to sample input serial data and to provide output data; a controlled tap delay with a selected tap having a phase offset from the input serial data, in which the selected tap is selectively coupleable to the data sampler to provide pseudo asynchronous input serial data; a first variable delay control adapted to delay a reference frequency provided to the controlled tap delay in response to the pseudo asynchronous input serial data; and a second delay control adapted to adjust the plurality of taps in response to the pseudo asynchronous input serial data. In additional embodiments, the pseudo asynchronous input serial data is provided from an interpolated phase from at least two selected taps.


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