The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2010

Filed:

Jun. 20, 2008
Applicant:

Josef Hoelzle, Woerishofen, DE;

Inventor:

Josef Hoelzle, Woerishofen, DE;

Assignee:

Qimonda AG, Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated logic circuit comprises a memory area, wherein the memory area comprises a plurality of groups of memory cells, each group of memory cells assigned an address. The memory area further comprises an address decoder having a plurality of address inputs for receiving an address and for selecting a group of memory cells to which the received address is assigned and a plurality of data outputs for outputting information stored in a group of memory cells which is selected by the address decoder. The integrated logic circuit further comprises a coupling device which couples at least one portion of the data outputs of the memory area to at least one portion of the address inputs of the address decoder.


Find Patent Forward Citations

Hoelzle, Josef. (2010). Integrated logic circuit and method for producing an integrated logic circuit (U.S. Patent No. 7773452). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7773452

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…