The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2010

Filed:

Dec. 22, 2005
Applicants:

Hsu-lin Fanchiang, Hsinchu, TW;

Jui-hung Hung, Hsinchu, TW;

Hui-min Tsai, Hsinchu, TW;

Inventors:

Hsu-lin FanChiang, Hsinchu, TW;

Jui-hung Hung, Hsinchu, TW;

Hui-min Tsai, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 9/475 (2006.01);
U.S. Cl.
CPC ...
Abstract

A frame-based phase-locked display controller used in a display system and method thereof are described. The frame-based phase-locked display controller for displaying a plurality of image frames in a video signal comprises a frame-based phase-locked loop and a synchronization signal generator. The frame-based phase-locked loop receives an oscillating signal and an input vertical synchronous signal to generate an output clock signal by phase-lock loop based on the frames. The synchronization signal generator, coupled to the frame-based phase-locked loop, receives the output clock signal to generate an output horizontal synchronous signal, an output vertical synchronous signal and an output display enable (DE) signal. The frame-based phase-locked loop comprises a first PLL, a frequency synthesizer, a second PLL, a fast phase detector, a phase frequency detector and an active pixel region generator. The active pixel region generator receives an input vertical synchronous signal to generate a reference signal associated with an active pixel region. The frame-based phase-locked loop frame-based phase-locks the display enable signal to the reference signal.


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