The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2010

Filed:

Dec. 14, 2007
Applicants:

GE Yang, Pleasanton, CA (US);

Guoqing Ning, Santa Clara, CA (US);

Beibei Ren, Milpitas, CA (US);

Hwong-kwo (Hank) Lin, Palo Alto, CA (US);

Charles Chew-yuen Young, Cupertino, CA (US);

Inventors:

Ge Yang, Pleasanton, CA (US);

Guoqing Ning, Santa Clara, CA (US);

Beibei Ren, Milpitas, CA (US);

Hwong-Kwo (Hank) Lin, Palo Alto, CA (US);

Charles Chew-Yuen Young, Cupertino, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/096 (2006.01);
U.S. Cl.
CPC ...
Abstract

Apparatuses and methods are provided for a self-timed dynamic sense amplifier flop circuit, wherein a pulse generating circuit may be adapted to generate at least a first logic signal based, at least in part, on a first evaluation node signal, and a discharge path circuit comprising at least a first transistor within a first stack of transistors may be operatively responsive to the first timing signal.


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