The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
May. 09, 2006
Takashi Noguchi, Seongnam-si, KR;
Hans S. Cho, Seoul, KR;
Wenxu Xianyu, Suwon-si, KR;
Do-young Kim, Suwon-si, KR;
Jang-yeong Kwon, Seongnam-si, KR;
Huaxiang Yin, Yongin-si, KR;
Kyung-bae Park, Seoul, KR;
Xiaoxin Zhang, Yongin-si, KR;
Takashi Noguchi, Seongnam-si, KR;
Hans S. Cho, Seoul, KR;
Wenxu Xianyu, Suwon-si, KR;
Do-young Kim, Suwon-si, KR;
Jang-yeong Kwon, Seongnam-si, KR;
Huaxiang Yin, Yongin-si, KR;
Kyung-bae Park, Seoul, KR;
Xiaoxin Zhang, Yongin-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A semiconductor device including a substrate, a P-MOS single crystal TFT formed on the substrate, and an N-MOS single crystal TFT formed on the P-MOS single crystal TFT. The source region of the P-MOS single crystal TFT and the source region of the N-MOS single crystal TFT may be connected to each other. The P-MOS single crystal TFT and the N-MOS single crystal TFT may share a common gate. Also, the P-MOS single crystal TFT may include a single crystal silicon layer with a crystal plane of (100) and a crystal direction of <100>. The N-MOS single crystal TFT may include a single crystal silicon layer having the same crystal direction as the single crystal silicon layer of the P-MOS single crystal TFT and having a tensile stress greater than the single crystal silicon layer of the P-MOS single crystal TFT.