The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
Mar. 06, 2007
Ichiro Omura, Kanagawa-ken, JP;
Yoko Sakiyama, Kanagawa-ken, JP;
Hideki Nozaki, Kanagawa-ken, JP;
Atsushi Murakoshi, Kanagawa-ken, JP;
Masanobu Tsuchitani, Kanagawa-ken, JP;
Koichi Sugiyama, Kanagawa-ken, JP;
Tsuneo Ogura, Kanagawa-ken, JP;
Masakazu Yamaguchi, Kanagawa-ken, JP;
Tatsuo Naijo, Tokyo, JP;
Ichiro Omura, Kanagawa-ken, JP;
Yoko Sakiyama, Kanagawa-ken, JP;
Hideki Nozaki, Kanagawa-ken, JP;
Atsushi Murakoshi, Kanagawa-ken, JP;
Masanobu Tsuchitani, Kanagawa-ken, JP;
Koichi Sugiyama, Kanagawa-ken, JP;
Tsuneo Ogura, Kanagawa-ken, JP;
Masakazu Yamaguchi, Kanagawa-ken, JP;
Tatsuo Naijo, Tokyo, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A power semiconductor device includes: a semiconductor layer having a trench extending along a first direction in a stripe configuration; a gate electrode buried in the trench for controlling a current flowing in the semiconductor layer; and a gate plug made of a material having higher electrical conductivity than the gate electrode, the gate plug having the stripe configuration and being connected to the gate electrode along the first direction. The semiconductor layer includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided partially in an upper face of the first semiconductor layer; a third semiconductor layer of the first conductivity type provided partially on the second semiconductor layer; and a fourth semiconductor layer of the second conductivity type provided on a lower face of the first semiconductor layer.