The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
Nov. 10, 2006
Chih-ching Shih, Pleasanton, CA (US);
Cheng H. Huang, Cupertino, CA (US);
Hugh Sung-ki O, Fremont, CA (US);
Yow-juang (Bill) Liu, San Jose, CA (US);
Chih-Ching Shih, Pleasanton, CA (US);
Cheng H. Huang, Cupertino, CA (US);
Hugh Sung-Ki O, Fremont, CA (US);
Yow-Juang (Bill) Liu, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Integrated circuit antifuse circuitry is provided. A metal-oxide-semiconductor (MOS) transistor serves as an electrically-programmable antifuse. The antifuse transistor has source, drain, gate, and substrate terminals. The gate has an associated gate oxide. In its unprogrammed state, the gate oxide is intact and the antifuse has a relatively high resistance. During programming, the gate oxide breaks down, so in its programmed state the antifuse transistor has a relatively low resistance. The antifuse transistor can be programmed by injecting hot carriers into the substrate of the device in the vicinity of the drain. Because there are more hot carriers at the drain than at the substrate, the gate oxide is stressed asymmetrically, which enhances programming efficiency. Feedback can be used to assist in turning the antifuse transistor on to inject the hot carriers.